#include "PAP_defs.h"

// Modify the following directives to configure the clock source
    
    /* Choose one of the following options for the clock source */
    #define ICS_SOURCE_FLL_OUTPUT
    //#define ICS_SOURCE_INTERNAL 
    //#define ICS_SOURCE_EXTERNAL  
 
    /* Choose powers of two: range 1-128 */
    #define ICS_REFERENCE_DIVIDER 1
     
    #define ICS_REFERENCE_INTERNAL
    #define ICS_INTERNAL_REF_CLK_ENABLE
    #define ICS_INTERNAL_REF_STOP_ENABLE
        
    /* Choose a value of either 1, 2, 4 or 8 */
    #define ICS_BUS_DIVIDER 1
     
    //#define ICS_RANGE_HIGH
    //#define ICS_HIGH_GAIN
    
    // If low power is efined, FLL is disabled in FLL bypassed mode
    //#define ICS_LOW_POWER
    //#define ICS_EXTERNAL_REF_REQUEST
    //#define ICS_EXTERNAL_REF_ENABLE
    //#define ICS_EXTERNAL_REF_STOP_ENABLE
    
    /* Choose one of the following values for the DCO range */
    //#define ICS_DCO_LOW_RANGE
    #define ICS_DCO_MID_RANGE
    //#define ICS_DCO_HIGH_RANGE

    //#define ICS_DCO_MAX_FREQ 
    
// Modify section ends here

// DO NOT MODIFY, CLOCK SOURCE CONFIGURATION



#ifdef ICS_SOURCE_FLL_OUTPUT
#define CLK_SRC 0x00
#undef ICS_SOURCE_INTERNAL
#undef ICS_SOURCE_EXTERNAL
#endif

#ifdef ICS_SOURCE_INTERNAL
#define CLK_SRC 0x40
#undef ICS_SOURCE_EXTERNAL
#endif

#ifdef ICS_SOURCE_EXTERNAL
#define CLK_SRC 0x80
#endif

#if (ICS_REFERENCE_DIVIDER == 1)
#define REF_DIV 0x00
#elif (ICS_REFERENCE_DIVIDER == 2)
#define REF_DIV 0x08
#elif (ICS_REFERENCE_DIVIDER == 4)
#define REF_DIV 0x10
#elif (ICS_REFERENCE_DIVIDER == 8)
#define REF_DIV 0x18
#elif (ICS_REFERENCE_DIVIDER == 16)
#define REF_DIV 0x20
#elif (ICS_REFERENCE_DIVIDER == 32)
#define REF_DIV 0x28
#elif (ICS_REFERENCE_DIVIDER == 64)
#define REF_DIV 0x30
#elif (ICS_REFERENCE_DIVIDER == 128)
#define REF_DIV 0x38
#else  // if no valid divider is selected, system defaults to 1
#define REF_DIV 0x00
#endif

#ifdef ICS_REFERENCE_INTERNAL
#define REFERENCE 0x04
#else
#define REFERENCE 0x00
#endif

#ifdef ICS_INTERNAL_REF_CLK_ENABLE
#define INT_REF_CLK 0x02
#else
#define INT_REF_CLK 0x00
#endif

#ifdef ICS_INTERNAL_REF_STOP_ENABLE
#define INT_REF_STOP 0x01
#else
#define INT_REF_STOP 0x00
#endif

#define ICS_CONTROL_REG1 (CLK_SRC | REF_DIV | REFERENCE | INT_REF_CLK | INT_REF_STOP )

#if (ICS_BUS_DIVIDER == 1)
#define BUS_DIV 0x00
#elif (ICS_BUS_DIVIDER == 2)
#define BUS_DIV 0x40
#elif (ICS_BUS_DIVIDER == 4)
#define BUS_DIV 0x80
#elif (ICS_BUS_DIVIDER == 8)
#define BUS_DIV 0xC0
#else                           // if no valid bus divider is selected, 
#define BUS_DIV 0x00            // system defaults to 2
#endif

#ifdef ICS_RANGE_HIGH
#define FREQ_RANGE 0x20
#else
#define FREQ_RANGE 0x00
#endif

#ifdef ICS_HIGH_GAIN
#define GAIN 0x01
#else
#define GAIN 0x00
#endif

#ifdef ICS_LOW_POWER
#define LOW_POWER 0x08
#else
#define LOW_POWER 0x00
#endif

#ifdef ICS_EXTERNAL_REF_REQUEST
#define EXT_OSCILLATOR 0x04
#else
#define EXT_OSCILLATOR 0x00
#endif

#ifdef ICS_EXTERNAL_REF_ENABLE
#define EXT_REF_ENABLE 0x02 
#else
#define EXT_REF_ENABLE 0x00
#endif

#ifdef ICS_EXTERNAL_REF_STOP_ENABLE
#define EXT_REF_STOP 0x01
#else
#define EXT_REF_STOP 0x00
#endif

#define ICS_CONTROL_REG2    (BUS_DIV | FREQ_RANGE | GAIN | LOW_POWER |      \
                            EXT_OSCILLATOR | EXT_REF_ENABLE | EXT_REF_STOP )
                            
                            
#ifdef ICS_DCO_LOW_RANGE
#define ICS_DCO_CONFIG 0
#undef ICS_DCO_MID_RANGE
#undef ICS_DCO_HIGH_RANGE
#endif

#ifdef ICS_DCO_MID_RANGE
#define ICS_DCO_CONFIG 1
#undef ICS_DCO_HIGH_RANGE
#endif

#ifdef ICS_DCO_HIGH_RANGE
#define ICS_DCO_CONFIG 2
#endif

#ifdef ICS_DCO_MAX_FREQ
#define ICS_DMX32_CONFIG 1
#else
#define ICS_DMX32_CONFIG 0
#endif

// DO NOT MODIFY ENDS HERE (CLOCK SOURCE CONFIG)

void vfnClockConfigure (void);